Techniques for Employing Via-in-Pad in PCB Layout and Production
Via-in-pad routing is an advanced technique in printed circuit board (PCB) design, offering several benefits for high-density interconnect (HDI) applications. This method places vias directly within component pads, saving PCB surface area and enabling higher routing density and tighter component placement. This can lead to improved signal performance due to shorter interconnect paths [2][3].
However, via-in-pad routing comes with its own set of challenges. It increases manufacturing complexity and cost, requiring advanced fabrication techniques like via filling and capping to maintain flat soldering surfaces. Via-in-pad routing can also introduce reliability challenges, particularly in flexible PCB areas due to added stiffness and the risk of damage [2][5].
In contrast, conventional via routing places vias outside of component pads, a method that simplifies manufacturing, reduces cost, and generally improves mechanical reliability. However, it consumes more board area for via breakout, limiting routing density and component miniaturization [3].
The choice of via-in-pad hole filling material depends on the coefficient of thermal expansion (CTE) of the via-in-pad fill material and the laminate used. Non-conductive epoxies, which are often cost-effective and have a CTE closer to that of laminates, are commonly used [2]. In some cases, laser microvias may be necessary when the remaining annular ring is insufficient after specifying the smallest drill diameter [1].
Sierra Circuits' capabilities encompass various scenarios for via-in-pad technology, provided the vias are at least 6 mils (0.006′′) wide [4]. The IPC Class 3 Design Guide, containing 8 chapters, 23 pages, offers guidelines for manufacturing defects, assembly processes, and IPC standards [6].
Via-in-pad guidelines for surface mount device routing include sticking to component manufacturers' recommendations, limiting microvias to one layer of the PCB, capping the non-component side with a solder mask, and avoiding leaving vias open unless necessary [1]. VIP structures require a completely filled cavity to eliminate air entrapment and outgassing, and a precisely flat planar surface for reliable BGA attachment [5].
It's worth noting that vias don't need to be filled if they are not used, and thermal pads don't require soldering, so they don't need to be counted as via-in-pad for online quoting [7]. The pad size in via-in-pad design should be sufficient to allow for via diameter and manufacturing tolerances to meet minimum annular ring requirements for IPC Class 2 or Class 3 [1].
In conclusion, via-in-pad routing offers advantages such as higher routing density, space saving, and potentially better signal integrity, but it also comes with greater manufacturing complexity, cost, and potential reliability risks, especially in flex zones. On the other hand, conventional via routing is simpler and more robust but less space-efficient [2][3][5]. As electronic components continue to shrink in size, via-in-pad technology represents a step towards innovative PCB build techniques.
References: 1. Via-in-Pad Routing Guidelines for Surface Mount Device Routing 2. Advantages and Challenges of Via-in-Pad Routing 3. Comparison of Via-in-Pad Routing and Conventional Via Routing 4. Sierra Circuits' Capabilities for Via-in-Pad Technology 5. Reliability Challenges in Via-in-Pad Routing, Particularly in Flex Zones 6. IPC Class 3 Design Guide 7. Via-in-Pad Technology: A Step Towards Innovative PCB Build Techniques
Controlled impedance technology is essential when using via-in-pad routing to maintain consistent signal integrity, as it helps control the electrical characteristics of high-speed signals [2]. The selection of appropriate via-in-pad filling materials is critical in this regard, particularly in terms of matching the coefficient of thermal expansion with the laminate used [2].
Manufacturing costs associated with via-in-pad technology can be higher compared to conventional via routing due to the need for advanced fabrication techniques like via filling and capping [2]. This higher cost should be considered when making a decision about whether to implement via-in-pad routing in a printed circuit board design.
